Persistent HyTM via Fast Path Fine-Grained Locking
| dc.contributor.author | Coccimiglio, Gaetano | |
| dc.contributor.author | Brown, Trevor | |
| dc.contributor.author | Ravi, Srivatsan | |
| dc.date.accessioned | 2026-10-22T14:24:37Z | |
| dc.date.issued | 2025-07-16 | |
| dc.description | Author manuscript, 18 pages, arXiv:2501.14783v2 (20 June 2025). Reviewed comparison confirms the publication’s algorithm, progress and evaluation material, with layout and presentation differences; not the publisher-produced PDF. © 2025 the authors; publication rights licensed to ACM. Author’s version, posted for personal use; not for redistribution. Definitive publication: SPAA 2025, pp. 413–428, https://doi.org/10.1145/3694906.3743314. PDF unchanged; no new Creative Commons licence assigned. | |
| dc.description.abstract | Utilizing hardware transactional memory (HTM) in conjunction with non-volatile memory (NVM) to achieve persistence is quite difficult and somewhat awkward due to the fact that the primitives utilized to write data to NVM will abort HTM transactions. We present several persistent hybrid transactional memory (HyTM) that, perhaps counterintuitively, utilize an HTM fast path primarily to read or acquire fine-grained locks which protect data items. Our implementations guarantee durable linearizable transactions and the STM path satisfies either weak progressiveness or strong progressiveness. We discuss the design choices related to the differing progress guarantees and we examine how these design choices impact performance. We evaluate our persistent HyTM implementations using various microbenchmarks. Despite the challenges and apparent awkwardness of using current implementations of HTM to achieve persistence, our implementations achieve up to 10x improved performance compared to the existing state of the art persistent STMs and up to 2.6x improved performance compared to the existing state of the art persistent HyTMs. | |
| dc.description.sponsorship | Natural Sciences and Engineering Research Council of Canada, CRDPJ 539431-19; DGECR-2019-00048; RGPIN-2019-04227 || Canada Foundation for Innovation John R. Evans Leaders Fund and Ontario Research Fund CFI Leaders Opportunity Fund, 38512 || University of Waterloo | |
| dc.identifier.uri | https://doi.org/10.1145/3694906.3743314 | |
| dc.identifier.uri | https://hdl.handle.net/10012/24592 | |
| dc.language.iso | en | |
| dc.publisher | ACM | |
| dc.relation.ispartofseries | SPAA'25 | |
| dc.relation.uri | https://gitlab.com/Coccimiglio/ptmbench | |
| dc.subject | non-volatile memory | |
| dc.subject | transactional memory | |
| dc.subject | hybrid transactional memory | |
| dc.subject | durable linearizability | |
| dc.title | Persistent HyTM via Fast Path Fine-Grained Locking | |
| dc.type | Conference Paper | |
| dcterms.bibliographicCitation | Gaetano Coccimiglio; Trevor Brown; Srivatsan Ravi. (2025). Persistent HyTM via Fast Path Fine-Grained Locking. Proceedings of the 37th ACM Symposium on Parallelism in Algorithms and Architectures. pp. 413-428. https://doi.org/10.1145/3694906.3743314. | |
| uws.contributor.affiliation1 | Faculty of Mathematics | |
| uws.contributor.affiliation2 | David R. Cheriton School of Computer Science | |
| uws.peerReviewStatus | Reviewed | |
| uws.scholarLevel | Faculty | |
| uws.typeOfResource | Text | en |
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