MoS2 Thin Film Transistors using PECVD Dielectrics and Optical Contrast Modeling for Thickness Measurement

Abstract

The discovery of graphene has led to considerable interest in the use of two-dimensional materials for use in transistors. Unlike graphene TMDCs such as MoS2 possess a band gap allowing them to obtain sufficient on/off ratios for digital logic applications. For MoS2 transistors, thermal SiO2 or high-k dielectrics such as Al2O3 and HfO2 are often used as gate dielectrics due to their high quality interfaces. However, MoS2 also shows considerable promise for large area TFT applications where a-Si:H (μe~1cm2V-1s-1) is conventionally used. For TFT applications conventional PECVD dielectrics such as SiNx and SiOx are necessary for low temperature large area deposition. MoS2 TFTs were fabricated in the bottom common gate configuration on PECVD dielectrics and using mechanically exfoliated flakes ~75nm thick showing mobilities of 13 cm2V-1s-1 ¬,sub threshold swings of 1.05 V/dec and ON/OFF current ratio of ~105. While this demonstrates the promise of TFTs made from these materials, considerable improvements are expected from MoS2 approaching one monolayer thickness. However, the process of scanning the substrate for MoS2 flakes using an optical microscope and measuring by AFM is time consuming and was unable to yield thin layers that were large enough to pattern using photolithography. In order to improve the process of optical identification and thickness measurement the RGB color models applied to the study of graphene on thermal SiO2 were adapted to the study of MoS2 on PECVD dielectrics. Using these models color charts for MoS2 on PECVD dielectric were generated and dielectrics were optimized for the visibility of monolayer MoS2. A rapid non-destructive method for measuring the thickness of MoS2 using images taken from a microscope camera is also presented. These calculations will help improve the fabrication process of mechanically exfoliated MoS2 devices in the future.