Duetto: Latency Guarantees at Minimal Performance Cost
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Date
2021-02-05
Authors
Mirosanlou, Reza
Hassan, Mohamed
Pellizzoni, Rodolfo
Journal Title
Journal ISSN
Volume Title
Publisher
IEEE Design, Automation and Test in Europe Conference (DATE)
Abstract
The management of shared hardware resources in multi-core platforms has been characterized by a fundamental trade-off:
high-performance arbiters typically employed in COTS systems offer no worst-case guarantees,
while dedicated real-time controllers provide timing guarantees at the cost of significantly degrading system performance.
In this paper, we overcome this trade-off by introducing Duetto, a novel hardware resource management paradigm. Duetto pairs a real-time arbiter with a high-performance arbiter and a latency estimator module. Based on the observation that the resource is rarely overloaded, Duetto executes the high-performance arbiter most of the time, switching to the real-time arbiter only in the rare cases when the latency estimator deems that timing guarantees risk being violated. We demonstrate our approach on the case study of a multi-bank memory. Our evaluation based on cycle-accurate simulations shows that Duetto can provide the same latency guarantees as the real-time arbiter with limited loss of performance compared to the high-performance arbiter.
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Keywords
real-time systems, memory architecture, Duetto