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dc.contributor.authorKember, Mitchell
dc.contributor.authorTran, Lynn
dc.contributor.authorGao, George
dc.contributor.authorDay, Nancy
dc.date.accessioned2020-06-16 19:21:55 (GMT)
dc.date.available2020-06-16 19:21:55 (GMT)
dc.date.issued2019
dc.identifier.urihttps://doi.org/10.1109/MiSE.2019.00015
dc.identifier.urihttp://hdl.handle.net/10012/15994
dc.description© 2019 IEEEen
dc.description.abstractWe address the problem of how to extract counterexamples for the transitive-closure-based model checking (TCMC) technique. TCMC is a representation of the CTLFC (CTL with fairness constraints) model checking problem in first-order logic with transitive closure (FOLTC) and has been implemented in the Alloy Analyzer. It is a declarative, symbolic model checking method. As a CTL model checking method, TCMC is defined over transition systems and states (rather than paths) and therefore, returns a transition system with a bug as a counterexample. Our contribution is to isolate a counterexample path/subgraph in a declarative manner by adding constraints that do not depend on the property. Our method does not require extensions to Alloy.en
dc.language.isoenen
dc.publisherIEEEen
dc.subjectmodel checkingen
dc.subjectcounterexamplesen
dc.subjectsubgraphsen
dc.subjectTCMCen
dc.subjectCTLFCen
dc.subjectformal verificationen
dc.subjecttemporal logicen
dc.subjecttransitive-closure-based model checkingen
dc.subjectCTL with fairness constraintsen
dc.subjectsymbolic model checkingen
dc.subjectCTL model checkingen
dc.subjectcounterexamples extractionen
dc.subjectCTLFC model checkingen
dc.subjectfirst-order logic with transitive closureen
dc.subjecttemporal logic propertyen
dc.subjectAlloyen
dc.subjectAlloy Analyzeren
dc.titleExtracting Counterexamples from Transitive-Closure-Based Model Checkingen
dc.typeConference Paperen
dcterms.bibliographicCitationM. Kember, L. Tran, G. Gao and N. Day, "Extracting Counterexamples from Transitive-Closure-Based Model Checking," 2019 IEEE/ACM 11th International Workshop on Modelling in Software Engineering (MiSE), Montreal, QC, Canada, 2019, pp. 47-54, doi: 10.1109/MiSE.2019.00015.en
uws.contributor.affiliation1Faculty of Engineeringen
uws.contributor.affiliation1Faculty of Mathematicsen
uws.contributor.affiliation2David R. Cheriton School of Computer Scienceen
uws.contributor.affiliation2Software Engineeringen
uws.typeOfResourceTexten
uws.peerReviewStatusRevieweden
uws.scholarLevelFacultyen
uws.scholarLevelOtheren


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