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dc.contributor.authorGRACIOLI, GIOVANI
dc.contributor.authorALHAMMAD, AHMED
dc.contributor.authorMANCUSO, RENATO
dc.contributor.authorFRÖHLICH, ANTÔNIO
dc.contributor.authorPellizzoni, Rodolfo 15:21:07 (GMT) 15:21:07 (GMT)
dc.description© ACM, 2015. This is the author's version of the work. It is posted here by permission of ACM for your personal use. Not for redistribution. The definitive version was published in ACM Computing Surveys, {48, 2, (November 2015)}
dc.description.abstractMulticore processors are being extensively used by real-time systems, mainly because of their demand for increased computing power. However, multicore processors have shared resources that affect the predictability of real-time systems, which is the key to correctly estimate the worst-case execution time of tasks. One of the main factors for unpredictability in a multicore processor is the cache memory hierarchy. Recently, many research works have proposed different techniques to deal with caches in multicore processors in the context of real-time systems. Nevertheless, a review and categorization of these techniques is still an open topic and would be very useful for the real-time community. In this article, we present a survey of cache management techniques for real-time embedded systems, from the first studies of the field in 1990 up to the latest research published in 2014. We categorize the main research works and provide a detailed comparison in terms of similarities and differences. We also identify key challenges and discuss future research directions.en
dc.description.sponsorshipKing Saud University NSERCen
dc.publisherAssociation of Computing Machineryen
dc.subjectcache managementen
dc.subjectreal-time sytsemsen
dc.titleA Survey on Cache Management Mechanisms for Real-Time Embedded Systemsen
uws.contributor.affiliation1Faculty of Engineeringen
uws.contributor.affiliation2Electrical and Computer Engineeringen

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