High Performance Elliptic Curve Cryptographic Co-processor
| dc.contributor.author | Lutz, Jonathan | en |
| dc.date.accessioned | 2006-08-22T14:02:51Z | |
| dc.date.available | 2006-08-22T14:02:51Z | |
| dc.date.issued | 2003 | en |
| dc.date.submitted | 2003 | en |
| dc.description.abstract | In FIPS 186-2, NIST recommends several finite fields to be used in the elliptic curve digital signature algorithm (ECDSA). Of the ten recommended finite fields, five are binary extension fields with degrees ranging from 163 to 571. The fundamental building block of the ECDSA, like any ECC based protocol, is elliptic curve scalar multiplication. This operation is also the most computationally intensive. In many situations it may be desirable to accelerate the elliptic curve scalar multiplication with specialized hardware. In this thesis a high performance elliptic curve processor is developed which is optimized for the NIST binary fields. The architecture is built from the bottom up starting with the field arithmetic units. The architecture uses a field multiplier capable of performing a field multiplication over the extension field with degree 163 in 0. 060 microseconds. Architectures for squaring and inversion are also presented. The co-processor uses Lopez and Dahab's projective coordinate system and is optimized specifically for Koblitz curves. A prototype of the processor has been implemented for the binary extension field with degree 163 on a Xilinx XCV2000E FPGA. The prototype runs at 66 MHz and performs an elliptic curve scalar multiplication in 0. 233 msec on a generic curve and 0. 075 msec on a Koblitz curve. | en |
| dc.format | application/pdf | en |
| dc.format.extent | 687060 bytes | |
| dc.format.mimetype | application/pdf | |
| dc.identifier.uri | http://hdl.handle.net/10012/855 | |
| dc.language.iso | en | en |
| dc.pending | false | en |
| dc.publisher | University of Waterloo | en |
| dc.rights | Copyright: 2003, Lutz, Jonathan. All rights reserved. | en |
| dc.subject | Electrical & Computer Engineering | en |
| dc.subject | elliptic curve co-processor | en |
| dc.subject | cryptography | en |
| dc.subject | koblitz curves | en |
| dc.subject | FPGA | en |
| dc.subject | hardware | en |
| dc.title | High Performance Elliptic Curve Cryptographic Co-processor | en |
| dc.type | Master Thesis | en |
| uws-etd.degree | Master of Applied Science | en |
| uws-etd.degree.department | Electrical and Computer Engineering | en |
| uws.peerReviewStatus | Unreviewed | en |
| uws.scholarLevel | Graduate | en |
| uws.typeOfResource | Text | en |
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