Fairness Notions on Hardware Resource Configuration
dc.contributor.author | Vellora Vayalapra, Aravind | |
dc.date.accessioned | 2023-10-26T12:42:59Z | |
dc.date.issued | 2023-10-26 | |
dc.date.submitted | 2023-10-16 | |
dc.description.abstract | To meet performance and energy efficiency demand of modern workloads, specialized hardware accelerators implemented on FPGAs or ASICs have found adoption in modern servers and Systems-on-Chip (SoC). These hardware accelerators cater to a wide range of applications such as Machine Learning, databases, analytics and networking. Prior studies have shown excessive underutilization, utilization ranging from 60% to as low as 20%. Sharing hardware among multiple users can mitigate underutilization but makes achieving QoS requirements a challenge. In this work, we explore hardware sharing on a GPU and employ game theory to present a formal model of sharing. We present notions of fairness, a performance model for heterogeneous hardware systems, and present a novel market-based mechanism to allocate and configure hardware resource. We implement the design on the open source Vortex GPU, and evaluate the system with 5 machine learning workloads – Resnet, AlexNet, YoloNet, K-Means clustering and multi-layer perceptron training. The evaluation showed that the market-based mechanism meets proportional QoS and we provide a theoretical guarantee. We observe up to 2x speedup and up to 10% higher utilization compared to traditional methods of providing equal resources. The system also chooses hardware configuration that maximizes the collective welfare of the users. | en |
dc.identifier.uri | http://hdl.handle.net/10012/20063 | |
dc.language.iso | en | en |
dc.pending | false | |
dc.publisher | University of Waterloo | en |
dc.subject | game theory | en |
dc.subject | accelerators | en |
dc.subject | hardware | en |
dc.subject | fairness | en |
dc.title | Fairness Notions on Hardware Resource Configuration | en |
dc.type | Master Thesis | en |
uws-etd.degree | Master of Applied Science | en |
uws-etd.degree.department | Electrical and Computer Engineering | en |
uws-etd.degree.discipline | Electrical and Computer Engineering | en |
uws-etd.degree.grantor | University of Waterloo | en |
uws-etd.embargo | 2024-10-25T12:42:59Z | |
uws-etd.embargo.terms | 1 year | en |
uws.comment.hidden | This is an update of the previous deposit with an updated embargo. | en |
uws.contributor.advisor | Kapre, Nachiket | |
uws.contributor.advisor | Majid Zahedi, Seyed | |
uws.contributor.affiliation1 | Faculty of Engineering | en |
uws.peerReviewStatus | Unreviewed | en |
uws.published.city | Waterloo | en |
uws.published.country | Canada | en |
uws.published.province | Ontario | en |
uws.scholarLevel | Graduate | en |
uws.typeOfResource | Text | en |
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