Incorporation of 3-Dimensional ZnO Nanowire Arrays in Bulk Heterojunction Solar Cells

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Date

2020-08-27

Authors

Davis, Kendall

Advisor

William, Wong

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University of Waterloo

Abstract

Organic solar cells have poor charge transport, with carrier mobilities and lifetimes of 3.9×10−4 cm2/Vs and 10-4 seconds in P3HT:PCBM devices. This poor mobility leads to higher recombination and lower short circuit current, causing lower power conversion efficiency. It is well known that an optimal nano-morphology for charge transport in organic solar cells resembles highly ordered donor and acceptor domains separated into “pillars” with a separation of twice the exciton diffusion length, allowing any exciton to diffuse to a donor/acceptor boundary horizontally, and allowing the vertical morphology to ensure a direct, phase continuous path for carrier flow to the electrodes. This ideal nano-morphology is very difficult to prepare, with bulk heterojunction devices being able to replicate a diminished version of its advantages. In this research, a method for incorporating a 3-dimensional front-contact extension composed out of ZnO nanowires in P3HT:PCBM bulk heterojunction solar cells as a way of further replicating the charge collection advantages of the pillared nano-morphology was investigated. This structure should increase electron charge collection by decreasing the distance needed for free charge carriers to travel. The inverted bulk-heterojunction device architecture is chosen because it introduces minimal changes to the standard fabrication process. Nanowires can be easily incorporated into devices by simply adding a hydrothermal growth step after the standard sol-gel ZnO spin coating process. Doing this, it is demonstrated that incorporating ZnO nanowires of carefully controlled height into the conventional bulk heterojunction polymer-fullerene device structure works as a method of increasing short circuit current relative to planar devices with identical fabrication processing. Nanowires of length greater than the active layer thickness are shown to short the device, and so the polymer layer thickness/nanowire length ratio is an important consideration. Process modification is needed, however, as the presence of ZnO nanowires appears to cause morphological changes that make device destroying PCBM agglomeration a significant issue. By increasing the P3HT:PCBM weight ratio, reducing the trace solvent concentration during the annealing procedure and using a reduced anneal time, this issue can be mitigated. However, the reduction in anneal time also results in lower base level performance for planar devices.

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