Low Power TFT Logic Implementation on Display Backplane, Using Unipolar TFTs

Abstract

Active-Matrix (AM) displays are key components in devices such as computer monitors, smartphones, laptops, portable gaming consoles, and wearable devices. These displays are trending towards becoming the primary display technology in today’s market. The demand for current displays has surpassed 4K (4096 rows by 2160 columns) and have even reached 8K Ultra-High-Definition (UHD, 7680 rows by 4320 columns). The display panel is generally fabricated on low-cost thin-film transistors (TFT), while the driver and control circuits are built using conventional Complementary-Metal-Oxide-Semiconductor (CMOS) circuits. A bonding pad serves as interface between CMOS circuits and TFT display panel. For each row and column of pixels added to the display backplane, an additional bonding pad needs to be added to properly interface the off-panel peripheral row and column control circuit with TFT and OLED pixel array. As the pixel density of the display increases, the bonding pad pitch must decrease, to accommodate. However, the pitch can only reduce finitely, and this imposes a bottleneck on achieving high-density large-scale displays. Additionally, with each row-line connected to a gate of thousands of pixels, there is a high capacitive load, which contributes to a high dynamic power consumption. Recent research has been investigating the use of TFTs to change the off-panel integrated-circuit (IC) and integrate it onto the display backplane, eliminating the need for bonding pads, while also reducing the overall power consumption. Amorphous silicon (a-Si:H) TFTs have good uniformity and low mask count fabrication process, making it suitable for large-scale displays, in comparison to Low-Temperature-Polysilicon (LTPS) TFTs. However, a-Si:H TFTs are naturally unipolar, which make it hard to replicate the CMOS like logic that the off-panel ICs have. This thesis aims at tackling the bottlenecks of large-scale displays, that is, the high dynamic power consumption, and the limited space from the bonding pads. The proposed row driver circuit presented in this thesis can be used to eliminate the off-panel row IC, and be integrated into the display backplane, while reducing the dynamic power consumption, with a-Si:H TFT technology.