Advanced Circuit and System Techniques for High-Performance Beamforming Front-Ends

Abstract

The emergence of sixth-generation (6G) wireless systems has accelerated the deployment of large-scale antenna arrays to overcome high-frequency path loss while supporting multi-gigabit data rates and improved spectral efficiency. This trend imposes increasingly stringent requirements on radio-frequency (RF) front ends, including compact implementation, broadband operation, high linearity, efficient transmit operation, and low receiver noise. At millimeter-wave (mmWave) frequencies, passive and switching losses further degrade power-amplifier (PA) efficiency and receiver (RX) noise figure (NF) in time-division-duplexing (TDD) front ends. Therefore, future RF building blocks must remain compact, broadband, highly linear, and robust under dynamically varying signal and load conditions.

This thesis addresses these beamforming-driven challenges through coordinated circuit and architecture-level innovations for key front-end components. First, two variable-gain phase shifter (VGPS) architectures are developed to provide compact amplitude/phase control with high accuracy, improved linearity, and wide gain-tuning range (GTR). The active unidirectional vector-sum phase shifter (VSPS), designed using a P1dB-driven load– pull methodology, achieves 0.24 dB rms gain error, 1.5◦ rms phase error, 4.1 dBm input 1-dB compression point (IP1dB), and 14 dB GTR over 35–43 GHz. The bidirectional passive VGPS further provides 20 dB GTR with sub-0.25 dB gain error and sub-1.6◦ phase error over 24–32 GHz, enabling precise beam steering and dynamic amplitude weighting for adaptive multi-beam operation.

Second, a unified co-design methodology for the low-noise amplifier (LNA), PA, and RF switch is introduced to reduce transmitter efficiency degradation and receiver noise penalties in TDD front ends. A Doherty PA improves backed-off efficiency under the high peak-to-average power ratio (PAPR) of beamformed signals, while the receiver-side LNA with an embedded switch uses a synthesized coupled lumped π-model input network to provide compact quarter-wave-equivalent impedance transformation. This approach extends bandwidth, reduces area, and satisfies noise matching, impedance matching, and transmit-to-receive isolation requirements. Measurements of the 37-41 GHz prototype demonstrate 20 dBm output power with power-added efficiency (PAE) of 23%/15% at peak and 6-dB back-off, respectively. In receive mode, the prototype achieves 21 dB gain, 4.5 dB noise figure, −16 dBm input P1dB, and 32 mW DC power consumption, while maintaining 35 dB TX-to-RX isolation.

The final contribution presents a transistor-based analog predistortion (APD) scheme for PA linearization with robustness to output-power and modulation-bandwidth variations. The nonlinear error-generator (EG) path is designed to track the target PA by using the same device technology, biasing condition, and circuit topology, while a closed-form formulation guides the complex weighting coefficients and explains the use of a fixed coefficient set across operating conditions. The proposed APD is validated using a 3.5-GHz class-AB gallium-nitride (GaN) PA driven by orthogonal frequency-division multiplexing (OFDM) signals with 20–150-MHz modulation bandwidths. At 100-MHz bandwidth and 24-dBm average output power, the APD improves the adjacent-channel power ratio (ACPR) from −34.6/ − 36.3 dBc to −45.6/ − 46.5 dBc and the normalized mean-square error (NMSE) from −23.4 dB to −36.2 dB. To reduce the efficiency penalty, a scaled-transistor EG with a reconfigurable directional coupler is further introduced and analyzed in terms of the linearity–efficiency trade-off. Continuous-wave simulations show that the output 1- dB compression point (OP1dB) increases from 36.5 dBm to 44.2 dBm, while the PAE at OP1dB improves from 12.2% to 31.7%. Measurements of a multi-layer printed circuit board (PCB) prototype confirm 8–10-dB ACPR improvement across 20-, 50-, and 80-MHz OFDM bandwidths using a single fixed APD setting, with NMSE reduced from 4.5–5.1% to 1.5–2.4%. At 20 MHz and 33.5-dBm average output power, the APD–PA configuration achieves 12.1% average drain efficiency, compared with 15.8% for the standalone PA, demonstrating robust analog linearization with limited efficiency penalty and without coefficient retuning.

Collectively, these contributions establish a unified circuit- and system-level design framework for beamforming front ends. The proposed VGPS, T/R front-end, and APD techniques jointly address the key requirements of high peak-to-average power ratio operation, wide gain tuning range, low receiver noise, backed-off efficiency, and robust linearity, enabling compact and bandwidth-scalable RF solutions for next-generation wireless infrastructure.