Noise and clock jitter analysis of sigma-delta modulators and periodically switched linear networks

dc.contributor.author	Dong, Yikui	en
dc.date.accessioned	2006-07-28T19:14:08Z
dc.date.available	2006-07-28T19:14:08Z
dc.date.issued	1999	en
dc.date.submitted	1999	en
dc.format	application/pdf	en
dc.format.extent	6459770 bytes
dc.format.mimetype	application/pdf
dc.identifier.uri	http://hdl.handle.net/10012/371
dc.language.iso	en	en
dc.pending	false	en
dc.publisher	University of Waterloo	en
dc.rights	Copyright: 1999, Dong, Yikui. All rights reserved.	en
dc.subject	Harvested from Collections Canada	en
dc.title	Noise and clock jitter analysis of sigma-delta modulators and periodically switched linear networks	en
dc.type	Doctoral Thesis	en
uws-etd.degree	Ph.D.	en
uws.peerReviewStatus	Unreviewed	en
uws.scholarLevel	Graduate	en
uws.typeOfResource	Text	en

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