Convex optimization and utility theory, new trends in VLSI circuit layout

dc.contributor.author	Etawil, Hussein A. Y.	en
dc.date.accessioned	2006-07-28T20:13:36Z
dc.date.available	2006-07-28T20:13:36Z
dc.date.issued	1999	en
dc.date.submitted	1999	en
dc.format	application/pdf	en
dc.format.extent	881891 bytes
dc.format.mimetype	application/pdf
dc.identifier.uri	http://hdl.handle.net/10012/598
dc.language.iso	en	en
dc.pending	false	en
dc.publisher	University of Waterloo	en
dc.rights	Copyright: 1999, Etawil, Hussein A. Y.. All rights reserved.	en
dc.subject	Harvested from Collections Canada	en
dc.title	Convex optimization and utility theory, new trends in VLSI circuit layout	en
dc.type	Doctoral Thesis	en
uws-etd.degree	Ph.D.	en
uws.peerReviewStatus	Unreviewed	en
uws.scholarLevel	Graduate	en
uws.typeOfResource	Text	en

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