Vertical Thin Film Transistors for Large Area Electronics
| dc.contributor.author | Moradi, Maryam | |
| dc.date.accessioned | 2008-08-29T19:11:07Z | |
| dc.date.available | 2014-07-08T05:00:11Z | |
| dc.date.issued | 2008-08-29T19:11:07Z | |
| dc.date.submitted | 2008 | |
| dc.description.abstract | The prospect of producing nanometer channel-length thin film transistors (TFTs) for active matrix addressed pixelated arrays opens up new high-performance applications in which the most amenable device topology is the vertical thin film transistor (VTFT) in view of its small area. The previous attempts at fabricating VTFTs have yielded devices with a high drain leakage current, a low ON/OFF current ratio, and no saturation behaviour in the output current at high drain voltages, all induced by short channel effects. To overcome these adversities, particularly dominant as the channel length approaches the nano-scale regime, the reduction of the gate dielectric thickness is essential. However, the problems with scaling the gate dielectric thickness are the high gate leakage current and early dielectric breakdown of the insulator, deteriorating the device performance and reliability. A novel ultra-thin SiNx film suitable for the application as the gate dielectric of short channel TFTs and VTFTs is developed. The deposition is performed in a standard 13.56MHz PECVD system with silane and ammonia precursor gasses diluted in nitrogen. The deposited 50nm SiNx films demonstrate excellent electrical characteristics in terms of a leakage current of 0.1 nA/cm² and a breakdown electric field of 5.6MV/cm. Subsequently, the state of the art performances of 0.5µm channel length VTFTs with 50 and 30nm thick SiNx gate dielectrics are presented in this thesis. The transistors exhibit ON/OFF current ratios over 10^9, the subthreshold slopes as sharp as 0.23 V/dec, and leakage currents in the fA range. More significantly, a high associated yield is obtained for the fabrication of these devices on 3-inch rigid substrates. Finally, to illustrate the tremendous potential of the VTFT for the large area electronics, a 2.2-inch QVGA AMOLD display with in-pixel VTFT-based driver circuits is designed and fabricated. An outstanding value of 56% compared to the 30% produced by conventional technology is achieved as the aperture ratio of the display. Moreover, the initial measurement results reveal an excellent uniformity of the circuit elements. | en |
| dc.description.embargoterms | 1 year | en |
| dc.identifier.uri | http://hdl.handle.net/10012/3937 | |
| dc.language.iso | en | en |
| dc.pending | true | en |
| dc.publisher | University of Waterloo | en |
| dc.subject | Thin Film Transistor | en |
| dc.subject | Vertical TFT | en |
| dc.subject | Gate Dielectric | en |
| dc.subject | Ultra-thin Silicon Nitride | en |
| dc.subject | Short Channel Effects | en |
| dc.subject | Scaling Rules | en |
| dc.subject | Large Area Electronics | en |
| dc.subject.program | Electrical and Computer Engineering | en |
| dc.title | Vertical Thin Film Transistors for Large Area Electronics | en |
| dc.type | Doctoral Thesis | en |
| uws-etd.degree | Doctor of Philosophy | en |
| uws-etd.degree.department | Electrical and Computer Engineering | en |
| uws.peerReviewStatus | Unreviewed | en |
| uws.scholarLevel | Graduate | en |
| uws.typeOfResource | Text | en |