Spin Qubit Compact Modeling and Co-Design with Cryogenic CMOS for Large-Scale Quantum Computing

Abstract

Quantum computing has emerged as a promising computational paradigm with the potential to solve certain classes of problems beyond the capabilities of conventional classical computers. Realizing this potential, however, requires the integration of millions of physical qubits with highly scalable cryogenic classical control electronics capable of generating precise, low-noise control signals while operating under stringent power and thermal constraints. Consequently, the co-design of quantum devices and classical control electronics has become a key challenge in the development of practical large-scale quantum computing systems. However, conventional quantum simulations typically assume ideal control signals, while classical circuit simulations neglect quantum dynamics, making it difficult to accurately evaluate the interaction between quantum devices and their control electronics at the system level.

This thesis presents a unified quantum-classical co-simulation framework for silicon quantum-dot (QD) spin qubits integrated with cryogenic CMOS control electronics. The proposed framework combines a SPICE-compatible compact qubit model, a scalable cryogenic CMOS control architecture, and a unified simulation methodology that enables realistic control-electronics behavior to be evaluated directly in terms of quantum-device performance.

A SPICE-compatible compact model for silicon QD spin qubits is first developed based on the density-matrix formalism and the Lindblad master equation. The model translates voltage waveforms applied to quantum-dot gate electrodes into time-dependent Hamiltonian parameters and computes the resulting quantum-state evolution, enabling direct prediction of gate fidelity using realistic control signals generated by classical circuits. Implemented in Verilog-A and integrated within standard electronic design automation tools, the model enables seamless incorporation of quantum-device dynamics into circuit-level simulations.

A scalable cryogenic CMOS control architecture is also developed to support signal routing and local addressing for large-scale spin-qubit arrays. The proposed architecture incorporates current-steering local-addressing circuits, hierarchical digital addressing, and globally distributed control waveforms generated by digital-to-analog converters (DACs), reducing wiring complexity while supporting operation compatible with surface-code quantum-error-correction architectures.

The compact qubit model and cryogenic CMOS control circuitry are integrated into a unified quantum-classical co-simulation framework. The framework is validated against reference quantum simulations using representative single-qubit and two-qubit gate operations, including X(π/2), Z(π/2), Hadamard, √SWAP, and controlled-phase (CZ) gates. The validated framework is subsequently applied to co-simulation using realistic CMOS-generated control waveforms to quantify the impact of classical control-electronics non-idealities on quantum-gate fidelity. The investigation encompasses both static and dynamic non-idealities, including DAC quantization, current-source mismatch, systematic voltage errors, stochastic noise, and timing-related imperfections. The results show that systematic voltage errors and low-frequency stochastic noise are the dominant fidelity-limiting mechanisms, whereas DAC quantization, current-source mismatch, and timing-related imperfections have comparatively minor effects over the investigated operating ranges.

In summary, by integrating a SPICE-compatible compact qubit model, a scalable cryogenic CMOS control architecture, and a unified quantum-classical co-simulation framework within a single simulation environment, this work establishes a practical methodology for quantum-classical co-design. Furthermore, it provides quantitative design guidelines for cryogenic CMOS control electronics by relating realistic circuit-level imperfections directly to quantum-gate fidelity, thereby laying the foundation for the development of scalable silicon spin-qubit quantum computing systems.