Now showing items 1-4 of 4

    • Cache Design for a Hardware Accelerated Sparse Texture Storage System 

      Yee, Wai Min (University of Waterloo, 2004)
      Hardware texture mapping is essential for real-time rendering. Unfortunately the memory bandwidth and latency often bounds performance in current graphics architectures. Bandwidth consumption can be reduced by ...
    • CLPush: Proactive Cache Transfers in NUMA Applications 

      Pathak, Gautam (University of Waterloo, 2023-09-26)
      Modern Non-Uniform Memory Access (NUMA) systems support a thread count of as much as 128 threads to support high performance applications. These systems usually employ a scalable cache-coherent directory mechanism to ensure ...
    • Models for Parallel Computation in Multi-Core, Heterogeneous, and Ultra Wide-Word Architectures 

      Salinger, Alejandro (University of Waterloo, 2013-04-26)
      Multi-core processors have become the dominant processor architecture with 2, 4, and 8 cores on a chip being widely available and an increasing number of cores predicted for the future. In addition, the decreasing costs ...
    • Resource Management for Delivery of Dynamic Information 

      Evans, David (University of Waterloo, 2005)
      Information delivery via the web has become very popular. Along with a growing user population, systems increasingly are supporting content that changes frequently, personalised information, and differentiation and ...

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