Now showing items 1-2 of 2

    • DuoMC: Tight DRAM Latency Bounds with Shared Banks and Near-COTS Performance 

      Mirosanlou, Reza; Hassan, Mohamed; Pellizzoni, Rodolfo (ACM International Symposium on Memory Systems (MEMSYS 2021), 2021-09-27)
      DRAM memory controllers (MCs) in COTS systems are designed primarily for average performance, offering no worst-case guarantees, while real-time MCs provide timing guarantees at the cost of a significant average performance ...
    • Mining Event Traces from Real-time Systems for Anomaly Detection 

      Salem, Mahmoud (University of Waterloo, 2019-02-19)
      Real-time systems are a significant class of applications, poised to grow even further as autonomous vehicles and the Internet of Things (IoT) become a reality. The computation and communication tasks of the underlying ...

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