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dc.contributor.authorChen, Yen-Mingen
dc.date.accessioned2006-08-22 13:45:28 (GMT)
dc.date.available2006-08-22 13:45:28 (GMT)
dc.date.issued2005en
dc.date.submitted2005en
dc.identifier.urihttp://hdl.handle.net/10012/963
dc.description.abstractThis thesis presents an analytical approach using Root-Loci method for designing optimum passive series RC snubbers for continuous-current synchronous buck switch mode power supply (SMPS). Synchronous buck SMPS is the most popular power converter topology found in modern consumer electronics. It offers relatively good efficiency to target the high-current and low-voltage requirements while it is also relatively inexpensive to implement. Passive series RC snubbers are simple, efficient and cost-effective open-loop equalizer circuit for synchronous buck SMPS. Its purpose is to control and to balance between the rate of rise and the overshoots of transient switching waveform in order to optimize efficiency and reliability Existing methods of RC snubber design are solely based on second-order approximation. It is investigated in this research that this approximation is highly inaccurate in SMPS applications because higher order equivalent models are required for the load path of the SMPS. The results using the RC snubbers obtained from existing method are shown to be unsatisfactory without correlation to the calculations and simulations based on second-order approximation. Optimum RC values obtained using Root-Loci approach presented in this thesis are shown to correlate to both Spice simulation and lab measurements.en
dc.formatapplication/pdfen
dc.format.extent2480333 bytes
dc.format.mimetypeapplication/pdf
dc.language.isoenen
dc.publisherUniversity of Waterlooen
dc.rightsCopyright: 2005, Chen, Yen-Ming . All rights reserved.en
dc.subjectElectrical & Computer Engineeringen
dc.subjectSnubberen
dc.subjectRC snubberen
dc.subjectRoot-Locien
dc.subjectRoot-Locusen
dc.subjectSynchronous Buck SMPSen
dc.titleRC Snubber Design using Root-Loci Approach for Synchronous Buck SMPSen
dc.typeMaster Thesisen
dc.pendingfalseen
uws-etd.degree.departmentElectrical and Computer Engineeringen
uws-etd.degreeMaster of Applied Scienceen
uws.typeOfResourceTexten
uws.peerReviewStatusUnrevieweden
uws.scholarLevelGraduateen


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