A Comprehensive Test and Diagnostic Strategy for TCAMs

dc.contributor.author	Wright, Derek	en
dc.date.accessioned	2006-08-22 14:02:33 (GMT)
dc.date.available	2006-08-22 14:02:33 (GMT)
dc.date.issued	2005	en
dc.date.submitted	2005	en
dc.identifier.uri	http://hdl.handle.net/10012/809
dc.description.abstract	Content addressable memories (CAMs) are gaining popularity with computer networks. Testing costs of CAMs are extremely high owing to their unique configuration. In this thesis, a fault analysis is carried out on an industrial ternary CAM (TCAM) design, and search path test algorithms are designed. The proposed algorithms are able to test the TCAM array, multiple-match resolver (MMR), and match address encoder (MAE). The tests represent a 6x decrease in test complexity compared to existing algorithms, while dramatically improving fault coverage.	en
dc.format	application/pdf	en
dc.format.extent	367597 bytes
dc.format.mimetype	application/pdf
dc.language.iso	en	en
dc.publisher	University of Waterloo	en
dc.rights	Copyright: 2005, Wright, Derek. All rights reserved.	en
dc.subject	Electrical & Computer Engineering	en
dc.subject	content addressable memory	en
dc.subject	design for test	en
dc.subject	semiconductor memory	en
dc.subject	test algorithms	en
dc.title	A Comprehensive Test and Diagnostic Strategy for TCAMs	en
dc.type	Master Thesis	en
dc.pending	false	en
uws-etd.degree.department	Electrical and Computer Engineering	en
uws-etd.degree	Master of Applied Science	en
uws.typeOfResource	Text	en
uws.peerReviewStatus	Unreviewed	en
uws.scholarLevel	Graduate	en