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dc.contributor.authorWright, Dereken 14:02:33 (GMT) 14:02:33 (GMT)
dc.description.abstractContent addressable memories (CAMs) are gaining popularity with computer networks. Testing costs of CAMs are extremely high owing to their unique configuration. In this thesis, a fault analysis is carried out on an industrial ternary CAM (TCAM) design, and search path test algorithms are designed. The proposed algorithms are able to test the TCAM array, multiple-match resolver (MMR), and match address encoder (MAE). The tests represent a 6x decrease in test complexity compared to existing algorithms, while dramatically improving fault coverage.en
dc.format.extent367597 bytes
dc.publisherUniversity of Waterlooen
dc.rightsCopyright: 2005, Wright, Derek. All rights reserved.en
dc.subjectElectrical & Computer Engineeringen
dc.subjectcontent addressable memoryen
dc.subjectdesign for testen
dc.subjectsemiconductor memoryen
dc.subjecttest algorithmsen
dc.titleA Comprehensive Test and Diagnostic Strategy for TCAMsen
dc.typeMaster Thesisen
dc.pendingfalseen and Computer Engineeringen
uws-etd.degreeMaster of Applied Scienceen

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