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dc.contributor.authorChammah, Tarek
dc.date.accessioned2011-10-04 14:20:14 (GMT)
dc.date.available2013-12-17 06:00:09 (GMT)
dc.date.issued2011-10-04T14:20:14Z
dc.date.submitted2011
dc.identifier.urihttp://hdl.handle.net/10012/6350
dc.description.abstractExisting atomic section interface proposals, thus far, have tended to only isolate transactions from each other. Less considered is the coordination of threads performing transactions with respect to one another. Synchronization of nested sections is typically relegated to outside of and among the top-level flattened sections. However existing models do not permit the composition of even simple synchronization constructs such as barriers. The proposed model integrates synchronization as a first-class construct in a truly nested atomic block implementation. The implementation is evaluated on quantitative benchmarks, with qualitative examples of the atomic section interface’s expressive power compared with conventional transactional memory implementations.en
dc.language.isoenen
dc.publisherUniversity of Waterlooen
dc.subjectconcurrencyen
dc.subjectparallelismen
dc.subjecttransactionsen
dc.subjectlocksen
dc.subjecttransactional memoryen
dc.subjectatomic sectionsen
dc.subjectlock inferenceen
dc.subjectcondition synchronizationen
dc.titleNested pessimistic transactions for both atomicity and synchronization in concurrent softwareen
dc.typeMaster Thesisen
dc.pendingtrueen
dc.subject.programComputer Scienceen
dc.description.embargoterms1 yearen
uws-etd.degree.departmentSchool of Computer Scienceen
uws-etd.degreeMaster of Mathematicsen
uws.typeOfResourceTexten
uws.peerReviewStatusUnrevieweden
uws.scholarLevelGraduateen


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