Browsing Theses by Author "Li, Si-Yun"

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Power Characterization of a Gbit/s FPGA Convolutional LDPC Decoder

Li, Si-Yun (University of Waterloo, 2012-08-31)

In this thesis, we present an FPGA implementation of parallel-node low-density-parity-check convolutional-code (PN-LDPC-CC) encoder and decoder. A 2.4 Gbit/s rate-1/2 (3, 6) PN-LDPC-CC encoder and decoder were implemented ...