Robustly Complete Temporal Logic Control Synthesis for Nonlinear Systems
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Modern systems such as spacecrafts and autonomous vehicles are complex yet safety-critical, and therefore the control methods that can deal with different dynamics and constraints while being provably correct are sought after. Formal methods are rigorous techniques originally used for developing and verifying finite-state systems with respect to specifications in formal languages. This thesis is concerned with using formal methods in control synthesis for nonlinear systems, which can guarantee the correctness of the resulting control strategies. For nonlinear continuous-state dynamical systems, formal control synthesis relies on finite abstractions of the original system by discretizing the system state space and over approximating system transitions. Without further assumptions, control synthesis is usually not complete in the way that no control strategies can be found even if there exists one. To deal with this problem, this thesis proposes a formal control synthesis approach that is sound and robustly complete in the sense that correct control strategies can be found whenever the specifications can be realized for the system with additional disturbance. Fundamental to the soundness and robust completeness is a fixed-point characterization of the winning set of the system with respect to a given specification, which is the set of initial conditions that can be controlled to satisfy the specification. Regarding discrete-time systems, such characterizations are first presented by using iterative computation of predecessors for basic linear temporal logic (LTL) specifications, including invariance, reachability and reach-and-stay. A more general class of LTL formulas, which can be translated into deterministic B\"uchi automata (DBA), is also considered, and an algorithm guided by the graph structure of the LTL-equivalent DBA is proposed for characterizing the winning set in this situation. It is then shown that the computational complexity of the algorithm can be reduced by using a pre-processing procedure to the graphs of the DBA. Because of the general nonlinearity, exact computation of winning sets is currently almost impossible. In this work, the conditions for set approximations are derived so that control synthesis is robustly complete. To meet such conditions, the proposed approach adopts interval arithmetic and a subdivision scheme in the approximation of predecessors. Under such a scheme, the system state space is adaptively partitioned with respect to both the given dynamics and specification and set approximation can be made arbitrarily precise to satisfy the robust completeness conditions. The proposed method is also shown applicable to sampled-data systems by computing validated solutions over one sampling period based on high-order Taylor expansion. Applications such as converter voltage regulation, parallel parking, and reactive locomotion planning problems are studied to show the effectiveness and efficiency of the proposed approach.
Cite this version of the work
Yinan Li (2019). Robustly Complete Temporal Logic Control Synthesis for Nonlinear Systems. UWSpace. http://hdl.handle.net/10012/15342