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dc.contributor.authorCui, Bolun 21:19:47 (GMT) 05:50:19 (GMT)
dc.description.abstractThis thesis explores the use of a 22-nm CMOS-SOI technology in the design of a two-stage amplifier which targets wide bandwidth, low noise and modest linearity in the 28 GHz band. A design methodology with a transformer-coupled, noise-matching interstage is presented for minimizing the noise factor of the two-stage amplifier. Furthermore, benefits of interstage noise matching are discussed. Next, a transistor layout for minimizing noise and maintaining sufficient electromigration reliability is described. It is followed by an analysis of transformer configurations and a transformer layout example is depicted. To verify the design methodology, two amplifier prototypes with noise-matching interstage were fabricated. Measurement shows that the first design achieves a peak gain of 20.7 dB and better-than-10-dB input and output return losses within a frequency range of 22.5 to 32.2 GHz. The lowest noise figure of 1.81 dB is achieved within the frequency range. Input IP3 of -13.4 dBm is achieved with the cost of 17.3 mW DC power consumption. When the bias at the back-gate is lowered from 2 V to 0.62 V, the power consumption is decreased to 5.6 mW and the peak gain drops down to 17.9 dB. Minimum noise figure increases from 1.81 to 2.13 dB and input IP3 drops to -14.4 dBm. The folded output stage in the second design improves the input IP3 to -6.7 dBm at the cost of 35 mW total power consumption. The peak gain of the second design is 20.1 dB, and the lowest noise figure of 1.73 dB within a frequency range of 23.8 to 32.4 GHz. Both designs occupy about 0.05 mm2 active area.en
dc.publisherUniversity of Waterlooen
dc.subjectLow-noise amplifieren
dc.subjectRF feedbacken
dc.subjectmm-wave transformeren
dc.subjectBroadband amplifieren
dc.subject.lcshMetal oxide semiconductors, Complementary.en
dc.subject.lcshSilicon-on-insulator technologyen
dc.subject.lcshLow noise amplifiersen
dc.subject.lcshBroadband amplifiersen
dc.title22-32 GHz Low-Noise Amplifier Design in 22-nm CMOS-SOI Technologyen
dc.typeMaster Thesisen
dc.pendingfalse and Computer Engineeringen and Computer Engineeringen of Waterlooen
uws-etd.degreeMaster of Applied Scienceen
uws-etd.embargo.terms1 yearen
uws.contributor.advisorLong, John
uws.contributor.affiliation1Faculty of Engineeringen

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