Theoretical and Experimental Analysis of Resistor Network for Use in Superconducting Analog-to-Digital Applications

Abstract

Superconducting micro-electronics (SME) technology is capable of realizing extremely high speed digital receivers performing direct digitization of microwave signals with very low power consumption. SME technology uses integrated circuits based on Josephson junctions and rapid single-flux quantum (RSFQ) logic operating at 4°K. The analogue-to-digital converter (ADC) is a basic building block of such receivers. Quantization and sampling are two fundamental parts of ADCs. Flash ADCs are the fastest converters and consist of comparators and a resistor network. This thesis investigates the use of a multi-layer niobium-based low-temperature superconducting process to implement a resistor network. Several configurations for resistors are investigated both electrically and thermally. The resistors are designed to maintain their values from DC to 50GHz. Floating metal structures are added and optimized to minimize the inductance of the structure in order to obtain frequency-independent resistors over a frequency range of 50GHz. Several resistors and R-2R ladder networks are fabricated in the same process and measured in an RF cryogenic probe station at the Centre for Integrated RF Engineering (CIRFE) Lab at the University of Waterloo. Theoretical thermal analysis, is also carried out for these resistors to investigate temperature variations through the structures when operating at different power levels. The investigation is important for making sure that the resistors’ dissipated heat does not raise the local temperature above the transition temperature of niobium.