Flag fault-tolerant error correction for cyclic CSS codes

Abstract

Fault-tolerant quantum error correction (FTEC) protocol is one of the most important components for a fault-tolerant simulation of a quantum circuit. It helps prevent error accumulation during the process which may cause the computation to fail. In a physical implementation of fault-tolerant circuits, the number of required ancilla qubits for the FTEC protocol can be a major concern because it grows exponentially as the level of concatenation increases whereas the resources are limited. Recently, the idea of using flag qubits to detect high-weight errors caused by fewer faults in syndrome extraction circuits has been proposed. The use of flag qubits allows the construction of fault-tolerant protocols with the fewest number of ancillas known to-date. In this work, some critical properties of CSS codes constructed from classical cyclic codes that enable the construction of a flag fault-tolerant error correction scheme are proved, and a fault-tolerant protocol along with a family of circuits for flag fault-tolerant error correction are given. The flag-FTEC protocol proposed in this work requires only four ancilla qubits and applicable to CSS codes of distance 3 constructed from classical cyclic codes.