High Linearity Broadband RF Vector Multiplier for Analog/RF Pre-distortion
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Wireless communication systems are moving towards a heterogeneous solution, where small-cell base stations such as pico-cells and femto-cells are used concurrently with macro- cell base stations in high data traffic areas. Small-cell networks are expected to provide much larger wireless data rates and capacity in small areas while only consuming a fraction of the power. However, power amplifier nonlinearity does not scale down with the size of the base station; a similar degree of nonlinearity correction is required in both small-cell and macro-cell base stations, meaning that the power consumed by the signal linearization circuits is the same. An analog-radio frequency pre-distortion (ARF-PD) solution, operating at a fraction of a conventional digital pre-distortion's power consumption, has been proposed to support the unrestrained growth of wireless communication. This thesis forms part of an ongoing research project aimed at developing a fully integrated ARF-PD solution - a promising, low-power alternative to digital pre-distortion for future wireless communications. Specifically, it focuses on delivering an integrated design of a low-power high-linearity broadband radio frequency (RF) vector multiplier, which can be used as part of the ARF-PD solution. An RF vector multiplier is considered one of the major function blocks in analog pre-distortion solutions, as it allows the analog pre-distorter to interface with the undistorted signal in the RF domain. In the thesis, two RF vector multiplier designs are proposed and implemented in integrated circuits. In the first implementation, the RF vector multiplier is designed to directly apply pre-distortion to the RF signal. This architecture imposes a need for high gain in the RF vector multiplier, which results in large transistor size and high power consumption in the output stage. The design is able to achieve promising simulation results, however, performance limitations and disadvantages are also clearly exposed compared to commercial products. To resolve the issues discovered, an alternative ARF-PD architecture is adopted to relax the output power level needed from the RF vector multiplier. In addition, a self-linearized variable gain amplifier topology is proposed to improve system linearity. Overall, the second design shows significant improvement in bandwidth, linearity and output noise level, while only consuming half of the power consumed by the first design. Ultimately, simulation results have shown satisfying performance for both RF vector multipliers as part of an ARF-PD system. However, both of the proposed integrated circuit designs should be validated by measurement.