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dc.contributor.authorTansuwannont, Theerapat
dc.date.accessioned2021-10-13 19:29:06 (GMT)
dc.date.available2021-10-13 19:29:06 (GMT)
dc.date.issued2021-10-13
dc.date.submitted2021-10-13
dc.identifier.urihttp://hdl.handle.net/10012/17636
dc.description.abstractIn quantum computation, errors in a quantum circuit arising from its interaction with the environment is one of the biggest obstacles to building large-scale quantum computers. One way to deal with such errors is using fault-tolerant error correction (FTEC), a procedure which suppresses error propagation in a quantum circuit, together with other fault-tolerant gadgets for quantum computation to simulate a quantum circuit. However, for some platforms in which the number of physical qubits is limited, achieving a fault-tolerant simulation with very low logical error rate can be challenging since large overhead is required. In this thesis, flag and weight parity techniques for FTEC which use only small number of ancillas are studied. The flag technique uses a few ancillas in circuits for syndrome measurement to detect high-weight errors arising from a few faults, while the weight parity technique uses weight parities and syndromes of errors to determine whether they are logically equivalent. The concepts of these two techniques can lead to the notion of distinguishable fault set, the central idea for the fault-tolerant protocol development in this thesis. In addition, fault-tolerant protocols for two families of codes are constructed: an FTEC protocol for the [[49,1,9]] concatenated Steane code which can correct up to 3 faults and uses 2 ancillas, and protocols for fault-tolerant quantum computation on capped color codes which require 1, 1, and 2 ancillas for the codes of distance 3, 5, and 7. The concept of distinguishable fault set also leads to a generalization of the definitions of fault-tolerant gadgets which give more flexibility when designing fault-tolerant protocols.en
dc.language.isoenen
dc.publisherUniversity of Waterlooen
dc.subjectquantum error correctionen
dc.subjectfault toleranceen
dc.subjectflagen
dc.subjectweight parityen
dc.titleFlags and Error Weight Parities: A Development of Fault-tolerant Quantum Computation with Few Ancillasen
dc.typeDoctoral Thesisen
dc.pendingfalse
uws-etd.degree.departmentPhysics and Astronomyen
uws-etd.degree.disciplinePhysics (Quantum Information)en
uws-etd.degree.grantorUniversity of Waterlooen
uws-etd.degreeDoctor of Philosophyen
uws-etd.embargo.terms0en
uws.contributor.advisorLeung, Debbie
uws.contributor.affiliation1Faculty of Scienceen
uws.published.cityWaterlooen
uws.published.countryCanadaen
uws.published.provinceOntarioen
uws.typeOfResourceTexten
uws.peerReviewStatusUnrevieweden
uws.scholarLevelGraduateen


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