Development of Control Circuits for Silicon MOS Quantum Dot Qubit Network

Abstract

Future quantum processors intend to operate on millions of qubits and Silicon Metal Oxide Semiconductor (MOS) Quantum Dot qubits are a good fit for such a large-scale system due to their compactness in size and large coherence time. To control the operations of the qubits in such a large-scale system, efficient and careful design of the control circuits is very challenging. Here, in this thesis a control circuit is designed for silicon MOS quantum dot qubits operating on a node/ network architecture. Rather than using a 2D array of quantum dots, a node/ network architecture provides enough space for the wiring of integrated control circuits. The control circuit designed here is expected to work on millikelvin (mK) temperature and number of control lines from the mK temperature to 1-4 K temperature, where the digital control systems are operated, is reduced significantly compared to the number of qubits. The reduction in number of control lines from mK temperature is one of the basic requirements while scaling up. All these control circuits operate on the quantum dots based on the assumption that, all the dots are at same potential throughout the network. In practice due to fabrication variations and connection differences the potential of quantum dots varies from qubit to qubit. To solve this problem and pre-tune all the quantum dots to same potential prior to the operation of control circuit, a device level error correcting scheme is introduced and verified by simulation in this thesis.