| dc.description.abstract | As information technology is moving toward a big data era, the conventional Von Neumann architecture has shown limitation in performance. This is constrained by the large volume of data being continuously fetched and stored through input-output (IO) device, which not only adds performance penalty but power penalty as well. Therefore, it is necessary to bring processing unit as close as possible to memory for minimizing data transmission. Memristors provide dual functionalities of data storage and computing at the same location without data transmission, therefore is one of the most promising candidates for energy efficient in-memory computing. However, being stochastic in nature, variations in memristor device is one of the major challenges in its use towards in-memory computing. In this thesis, we demonstrate novel memristor devices with unique characteristics, which could facilitate reprogrammable application and high-density storage. Further, we demonstrate the applications of the fabricated memristor devices for in-memory computing, with a motive for less sensitive circuits towards variations in devices.
In the first device, TiO2 and maple leaves (ML) are combined to form a functional layer (TiO2-ML) inside memristive devices, which demonstrate both the capacitive effect and the non-volatile storage capability. When the voltage increases from zero, the device firstly enters a capacitive-coupled memristive state at low voltage before switch to normal memristive state at a higher voltage. The existence of capacitive coupled and memristive behavior, modulated by programming voltage, forms a unique reprogrammable device. In the second device, formed by Al/TiO2-Graphene-DNA/Pt layers, high performance and stable intermediate multistate resistive switching behaviors have been achieved. Further, for in-memory computing, a high-density memory and multibit parallel logic computations are realized based on the multistate resistive switching behaviors. This improves data storage capacity and performance up to 2 with respect to conventional single bit memristor devices when they are used to store binary data, without any compromise in accuracy. Further, we use Al/TiO2/Al memristor device, to demonstrate a variation tolerant analog-digital-hybrid matrix multiplication circuit, for high precision and efficient in-memory computing. It was observed that, in comparison to conventional analog based matrix multiplication scheme using memristor, the proposed scheme improves the average accuracy up to 16.35%, with sacrificing power, performance and area up to 18.5%, 8.2% and 3.2% respectively. This work provides a new horizon on the memristor devices and will improve the understanding of engineering device and circuits for efficient and variation tolerant in-memory computing. | en |
