Now showing items 1-3 of 3

    • Analysis and Design of Robust Multi-Gb/s Clock and Data Recovery Circuits 

      Rennie, David J. (University of Waterloo, 2007-09-26)
      The bandwidth demands of modern computing systems have been continually increasing and the recent focus on parallel processing will only increase the demands placed on data communication circuits. As data rates enter the ...
    • Test Chip Design for Process Variation Characterization in 3D Integrated Circuits 

      O'Sullivan, Conor (University of Waterloo, 2013-09-23)
      A test chip design is presented for the characterization of process variations and Through Silicon Via (TSV) induced mechanical stress in 3D integrated circuits. The chip was de- signed, layed-out, and taped-out for ...
    • Variability-Aware Design of Subthreshold Devices 

      Jaramillo Ramirez, Rodrigo (University of Waterloo, 2007-08-10)
      Over the last 10 years, digital subthreshold logic circuits have been developed for applications in the ultra-low power design domain, where performance is not the priority. Recently, devices optimized for subthreshold ...


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