Singh, Ajay2018-09-052018-09-052018-09-052018-08-31http://hdl.handle.net/10012/13747In embedded systems, anomalies can be detected by monitoring the power consumption of the device. Recent literature has shown the use of this technique for the purpose of safety as well as security. However, on-the-fly power monitoring and classification becomes more complex as we increase the sampling rate of the power signal. This thesis presents a study where we experimentally evaluate the required sampling frequency, with respect to classification accuracy, as a function of clock frequency. We analyze the system’s classification accuracy by running it at different clock speeds and varying the sampling frequency for power trace capture. We also show the effect of the sampling frequency on parameters such as training time and classification time.enpower traceanomaly detectionsafety and security of embedded systemsampling frequencyMaster Thesis