Browsing Waterloo Research by Author "Hassan, Mohamed"
Now showing items 1-3 of 3
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APPENDIX to DRAMbulism: Balancing Performance and Predictability through Dynamic Pipelining
Mirosanlou, Reza; Hassan, Mohamed; Pellizzoni, Rodolfo (2020-03-02)Worst-case execution bounds for real-time programs are highly impacted by the latency of accessing hardware shared resources, such as off-chip DRAM. While many different memory controller designs have been proposed in the ... -
Duetto: Latency Guarantees at Minimal Performance Cost
Mirosanlou, Reza; Hassan, Mohamed; Pellizzoni, Rodolfo (IEEE Design, Automation and Test in Europe Conference (DATE), 2021-02-05)The management of shared hardware resources in multi-core platforms has been characterized by a fundamental trade-off: high-performance arbiters typically employed in COTS systems offer no worst-case guarantees, while ... -
DuoMC: Tight DRAM Latency Bounds with Shared Banks and Near-COTS Performance
Mirosanlou, Reza; Hassan, Mohamed; Pellizzoni, Rodolfo (ACM International Symposium on Memory Systems (MEMSYS 2021), 2021-09-27)DRAM memory controllers (MCs) in COTS systems are designed primarily for average performance, offering no worst-case guarantees, while real-time MCs provide timing guarantees at the cost of a significant average performance ...