Now showing items 1-3 of 3
Worst Case Latency Analysis for Hoplite FPGA-based NoC
Overlay NoCs, such as Hoplite, are cheap to implement on an FPGA but provide no bounds on worst-case routing latency of packets traversing the NoC due to deflection routing. In this paper, we show how to adapt Hoplite to ...
Fatigue Life Prediction of an Automotive Chassis System with Combined Hardening Material Model
(Society of Automotive Engineers, 2016-04-05)
The choice of an appropriate material model with parameters derived from testing and proper modeling of stress-strain response during cyclic loading are the critical steps for accurate fatigue-life prediction of complex ...
Data Scratchpad Prefetching for Real-time Systems
In recent years, the real-time community has produced a variety of approaches targeted at managing on- chip memory (scratchpads and caches) in a predictable way. However, to obtain safe Worst-Case Execution Time (WCET) ...