Browsing Theses by Author "O'Sullivan, Conor"
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Test Chip Design for Process Variation Characterization in 3D Integrated Circuits
O'Sullivan, Conor (University of Waterloo, 2013-09-23)A test chip design is presented for the characterization of process variations and Through Silicon Via (TSV) induced mechanical stress in 3D integrated circuits. The chip was de- signed, layed-out, and taped-out for ...