Browsing University of Waterloo by Subject "serial and parallel FPGA architecture"
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Hardware Implementation of a Fixed-Point Decoder for Low-Density Lattice Codes
(Springer, 2022-01-31)This paper describes a field-programmable gate array (FPGA) implementation of a fixed-point low-density lattice code (LDLC) decoder where the Gaussian mixture messages that are exchanged during the iterative decoding process ... -
Hardware Implementation of Fixed-Point Decoder for Low-Density Lattice Codes
(University of Waterloo, 2022-04-29)Low-density lattice codes (LDLCs) are a special class of lattice codes that can be decoded efficiently using iterative decoding and approach the capacity of the additive white Gaussian noise (AWGN) channel. The construction ...