Browsing University of Waterloo by Subject "VLSI"
Now showing items 1-16 of 16
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CAD Techniques for Robust FPGA Design Under Variability
(University of Waterloo, 2010-09-01)The imperfections in the semiconductor fabrication process and uncertainty in operating environment of VLSI circuits have emerged as critical challenges for the semiconductor industry. These are generally termed as process ... -
CDM Robust & Low Noise ESD protection circuits
(University of Waterloo, 2009-01-20)In spite of significant progress during last couple of decades, ESD still affects production yields, manufacturing costs, product quality, product reliability and profitability. The objective of an ESD protection circuit ... -
A Comparative Analysis of 6T and 10T SRAM Cells for Sub-threshold Operation in 65 nm CMOS Technology
(University of Waterloo, 2016-09-27)The aggressive approach of the integrated electronics industry towards scaling and the growing trend of low-power applications have led to major research interest in ultra-low power integrated circuits. One of the integrated ... -
A Constant Delay Logic Style - An Alternative Way of Logic Design
(University of Waterloo, 2010-07-20)High performance, energy efficient logic style has always been a popular research topic in the field of very large scale integrated (VLSI) circuits because of the continuous demands of ever increasing circuit operating ... -
Convex Optimization and Utility Theory: New Trends in VLSI Circuit Layout
(University of Waterloo, 1999)The design of modern integrated circuits is overwhelmingly complicated due to the enormous number of cells in a typical modern circuit. To deal with this difficulty, the design procedure is broken down into a set of ... -
Design and Analysis of Low-power SRAMs
(University of Waterloo, 2006)The explosive growth of battery operated devices has made low-power design a priority in recent years. Moreover, embedded SRAM units have become an important block in modern SoCs. The increasing number of transistor ... -
Electrostatic discharge protection circuit for high-speed mixed-signal circuits
(University of Waterloo, 2007-05-10)ESD, the discharge of electrostatically generated charges into an IC, is one of the most important reliability problems for ultra-scaled devices. This electrostatic charge can generate voltages of up to tens of kilovolts. ... -
Energy Efficient Design for Deep Sub-micron CMOS VLSIs
(University of Waterloo, 2005)Over the past decade, low power, energy efficient VLSI design has been the focal point of active research and development. The rapid technology scaling, the growing integration capacity, and the mounting active and leakage ... -
High-Performance, Energy-Efficient CMOS Arithmetic Circuits
(University of Waterloo, 2014-10-16)In a modern microprocessor, datapath/arithmetic circuits have always been an important building block in delivering high-performance, energy-efficient computing, because arithmetic operations such as addition and binary ... -
Low-Power Soft-Error-Robust Embedded SRAM
(University of Waterloo, 2013-01-08)Soft errors are radiation-induced ionization events (induced by energetic particles like alpha particles, cosmic neutron, etc.) that cause transient errors in integrated circuits. The circuit can always recover from such ... -
Modeling and Mitigation of Soft Errors in Nanoscale SRAMs
(University of Waterloo, 2008-12-05)Energetic particle (alpha particle, cosmic neutron, etc.) induced single event data upset or soft error has emerged as a key reliability concern in SRAMs in sub-100 nanometre technologies. Low operating voltage, small node ... -
On The Engineering of a Stable Force-Directed Placer
(University of Waterloo, 2004)Analytic and force-directed placement methods that simultaneously minimize wire length and spread cells are receiving renewed attention from both academia and industry. However, these methods are by no means trivial to ... -
On the Use of Directed Moves for Placement in VLSI CAD
(University of Waterloo, 2009-07-31)Search-based placement methods have long been used for placing integrated circuits targeting the field programmable gate array (FPGA) and standard cell design styles. Such methods offer the potential for high-quality ... -
Parallel Multiplier Designs for the Galois/Counter Mode of Operation
(University of Waterloo, 2008-06-09)The Galois/Counter Mode of Operation (GCM), recently standardized by NIST, simultaneously authenticates and encrypts data at speeds not previously possible for both software and hardware implementations. In GCM, data ... -
Parametric Yield of VLSI Systems under Variability: Analysis and Design Solutions
(University of Waterloo, 2011-04-29)Variability has become one of the vital challenges that the designers of integrated circuits encounter. variability becomes increasingly important. Imperfect manufacturing process manifest itself as variations in the ... -
Statistical Yield Analysis and Design for Nanometer VLSI
(University of Waterloo, 2010-08-20)Process variability is the pivotal factor impacting the design of high yield integrated circuits and systems in deep sub-micron CMOS technologies. The electrical and physical properties of transistors and interconnects, ...