|
UWSpace >
University of Waterloo >
Electronic Theses and Dissertations (UW) >
Please use this identifier to cite or link to this item:
http://hdl.handle.net/10012/1140
|
| Title: | Automated Analysis of Unified Modeling Language (UML) Specifications |
| Authors: | Tanuan, Meyer C. |
| Keywords: | Computer Science Object-Oriented Software Specification UML Model Checking SMV |
| Approved Date: | 2001 |
| Date Submitted: | 2001 |
| Abstract: | The Unified Modeling Language (UML) is a standard language adopted by the Object Management Group (OMG) for writing object-oriented (OO) descriptions of software systems. UML allows the analyst to add class-level and system-level constraints. However, UML does not describe how to check the correctness of these constraints. Recent studies have shown that Symbolic Model Checking can effectively verify large software specifications. In this thesis, we investigate how to use model checking to verify constraints of UML specifications. We describe the process of specifying, translating and verifying UML specifications for an elevator example. We use the Cadence Symbolic Model Verifier (SMV) to verify the system properties. We demonstrate how to write a UML specification that can be easily translated to SMV. We propose a set of rules and guidelines to translate UML specifications to SMV, and then use these to translate a non-trivial UML elevator specification to SMV. We look at errors detected throughout the specification, translation and verification process, to see how well they reveal errors, ambiguities and omissions in the user requirements. |
| Department: | School of Computer Science |
| Degree: | Master of Mathematics |
| URI: | http://hdl.handle.net/10012/1140 |
| Appears in Collections: | Electronic Theses and Dissertations (UW) Faculty of Mathematics Theses and Dissertations
|
This item is protected by original copyright
|
All items in UWSpace are protected by copyright, with all rights reserved.
|